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Computer System Architecture >> Content Detail



Calendar / Schedule



Calendar

The calendar below provides information on the course's lecture (L), tutorial (T), and quiz (Q) sessions.



Calendar Legend


(A): Session taught by Professor Arvind
(J): Session taught by Dr. Joel Emer


SES #TOPICSKEY DATES
L1History of Calculation and Computer Architecture (A)Self-assessment test (A)
L2Influence of Technology and Software on Instruction Sets: Up to the Dawn of IBM 360 (A)
L3Complex Instruction Set Evolution in the Sixties: Stack and GPR Architectures (A)Self-assessment test due (A)
T1Self-assessment Test and ISA
L4Microprogramming (A)
T2MIPS ISA, Bus-based Implementation, and Microprogramming
L5Simple Instruction Pipelining (A)
L6Pipeline Hazards (A)
T3Microprogramming, Pipelining, and Hazards
L7Multilevel Memories - Technology (J)
L8Cache (Memory) Performance Optimization (J)
Q1ISAs, Microprogramming, Simple Pipelining and Hazards
L9Virtual Memory Basics (J)
T4Quiz 1, Caches, and Virtual Memory Basics
L10Virtual Memory: Part Deux (A)
L11Complex Pipelining (A)
Q2Caches, Virtual Memory
L12Out of Order Execution and Register Renaming (A)
L13Branch Prediction and Speculative Execution (A)
T5Quiz 2, Scoreboarding, Register Renaming, and Branch Prediction
L14Advanced Superscalar Architectures (J)
L15Microprocessor Evolution: 4004 to Pentium 4 (J)
Q3Complex Pipelines
L16Synchronization and Sequential Consistency (A)
L17Cache Coherence (A)
L18Cache Coherence (Implementation) (A)
L19Snoopy Protocols (A)
T6Sequential Consistency, Synchronization, Cache Coherence Protocols
L20Relaxed Memory Models (A)
Q4SMPs, CC, Synch, Memory Models
L21VLIW/EPIC: Statically Scheduled ILP (J)
L22Vector Computers (J)
T7Quiz 4 and VLIW
L23Multithreaded Processors (J)
L24Reliable Architectures (J)
T8Vector Computers, Multithreading and Reliable Architectures
L25Virtual Machines (J)
Q5VLIW/Vector/Threads

 








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